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ADS-945
14-Bit, 10MHz Sampling A/D Converters
FEATURES
* * * * * * * * * * * 14-bit resolution 10MHz minimum throughput Functionally complete No missing codes Low power, 4.0W Excellent dynamic performance Internally clamped input Edge triggered TTL compatible 2" x 4" module Very low profile
INPUT/OUTPUT CONNECTIONS
PIN
1 4 5-6 7 8 9 10-11 12 13 14 15-17 18 19-25 26 27 28 29 30 31 32 33 34 35 36 37 38
FUNCTION
ANALOG GROUND ANALOG INPUT ANALOG GROUND +10V REFERENCE OUT ANALOG GROUND GAIN ADJUST DO NOT CONNECT -15V SUPPLY ANALOG GROUND +15V SUPPLY ANALOG GROUND OFFSET ADJUST ANALOG GROUND MISSING PIN DIGITAL GROUND DIGITAL GROUND T/H STATUS T/H STATUS DIGITAL GROUND START CONVERT OVERFLOW OUTPUT ENABLE (OE) DIGITAL GROUND NO CONNECT DIGITAL GROUND DIGITAL GROUND
PIN
70-76 69 64-68 63 62 61 58-60 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39
FUNCTION
ANALOG GROUND +5V ANALOG SUPPLY ANALOG GROUND -5.2V ANALOG SUPPLY ANALOG GROUND NO CONNECT DIGITAL GROUND -5.2V DIGITAL SUPPLY DO NOT CONNECT +5V DIGITAL SUPPLY DIGITAL GROUND BIT 1 (MSB) BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8 BIT 9 BIT 10 BIT 11 BIT 12 BIT 13 BIT 14 (LSB) DIGITAL GROUND
GENERAL DESCRIPTION
The low-cost ADS-945 is a high-performance, 14-bit, 10MHz sampling A/D converter. This device accurately samples full-scale input signals up to Nyquist frequencies with no missing codes. The dynamic performance of the ADS-945 has been optimized to achieve a THD of -80dB and a SNR of 75dB. Packaged in a 2" x 4" module, the functionally complete ADS-945 contains a fast-settling sample/hold amplifier, a subranging (two-pass) A/D converter, a precise voltage reference, timing/control logic, three-state outputs, and error-correction circuitry. Digital inputs and outputs are TTL compatible (except for pins 29 and 30 which are ECL). Requiring 15V, +5V and -5.2V supplies, the ADS-945 typically dissipates 4.0W. The unit is offered with a bipolar input range of 1.25V. Models are available for use in either commercial (0 to +70C) or military (-55 to +125C) operating temperature ranges. Typical applications include radar signal analysis, medical/graphic imaging, and FFT spectrum analysis.
33 OVERFLOW BUFFER ANALOG INPUT 4 +1 T/H 53 BIT 1 (MSB) FLASH ADC 1 52 BIT 2
DIGITAL CORRECTION LOGIC 3-STATE OUTPUT REGISTER
51 BIT 3 50 BIT 4 49 BIT 5 48 BIT 6 47 BIT 7 46 BIT 8 45 BIT 9 44 BIT 10 43 BIT 11 42 BIT 12 41 BIT 13 40 BIT 14 (LSB)
GAIN ADJUST 9 +10 REF. OUT 7 CASE 1,2,3,5,6,8,13,15,17, 19-25,62,64-68,70-76 ANALOG GROUND OFFSET ADJUST 18 AGND
GAIN CIRCUIT
REF DAC
DGND OFFSET CIRCUIT AMP FLASH ADC 2
START CONVERT 32 T/H STATUS 29 T/H STATUS 30
TIMING AND CONTROL LOGIC
34 OUTPUT ENABLE 26 MISSING PIN 10,11,56 DO NOT CONNECT
12 -15V SUPPLY
14 +15V SUPPLY
27,28,31,35,37-39,54,58-60 DIGITAL GROUND
36, 61 NO CONNECT
55 +5V DIGITAL SUPPLY
57 -5.2V DIGITAL SUPPLY
Figure 1. ADS-945 Functional Block Diagram
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) * Tel: (508) 339-3000 Fax: (508) 339-6356 * For immediate assistance: (800) 233-2765
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ADS-945
ABSOLUTE MAXIMUM
PARAMETERS +15V Supply (Pins 14) -15V Supply (Pin 12) +5V Supply (Pins 55, 69) -5V Supply (Pin 57, 63) Digital Input (Pin 32, 34) Analog Input (Pin 4) Lead Temperature (10 seconds) LIMITS 0 to +16 0 to -16 0 to +6 0 to -6 -0.3 to +VDD +0.3 -15 to +15 +300 UNITS Volts Volts Volts Volts Volts Volts C
PHYSICAL/ENVIRONMENTAL
PARAMETERS Operating Temp. Range, Case ADS-945 ADS-945EX Thermal Impedance jc ca Storage Temperature Range Package Type Weight MIN. 0 -55 -- -- -65 TYP. -- -- MAX. +70 +125 UNITS C C C/Watt C/Watt C
10 -- 8 -- -- +150 2" x 4" module 2.1 oz. (60 grams)
FUNCTIONAL SPECIFICATIONS
(TA = +25C, VCC = 15V, +VDD = +5V, VDD = -5.2V, 10MHz sampling rate, and a minimum 10 minute warmup unless otherwise specified.) +25C ANALOG INPUT Input Voltage Range Input Resistance Input Capacitance Input Bias Current DIGITAL INPUT Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Start Convert Positive Pulse Width STATIC PERFORMANCE Resolution Integral Nonlinearity (dc input) Differential Nonlinearity (fin = 10kHz) Full Scale Absolute Accuracy Bipolar Offset Error (Tech Note 2) Gain Error (Tech Note 2) No Missing Codes (fin = 10kHz) DYNAMIC PERFORMANCE Peak Harmonics (-0.5dB) dc to 1mHz 1MHz to 2.5MHz 2.5MHz to 5MHz Total Harmonic Distortion (-0.5dB) dc to 1MHz 1MHz to 2.5MHz 2.5MHz to 5MHz Signal-to-Noise Ratio (w/o distortion, -0.5dB) dc to 1MHz 100kHz to 2.5MHz 2.5MHz to 5MHz Signal-to-Noise Ratio (& distortion, -0.5dB) dc to 100kHz 1MHz to 2.5MHz 2.5MHz to 5MHz Noise Two-tone Intermodulation Distortion (fin = 1.975MHz, 2.45MHz, fs = 10MHz, -0.5dB) Input Bandwidth (-3dB) Small Signal (-20dB input) Large Signal (-0.5dB input) Feedthrough Rejection (fin = 4.85MHz) Slew Rate Aperture Delay Time Aperture Uncertainty -- -- -- -- -- -- 71 71 70 70 70 69 -- -- -- -- -- -- -- -- -80 -80 -79 -80 -80 -78 75 75 74 77 74 73 110 -84 100 50 90 650 8 2 -75 -75 -73 -75 -74 -71 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 69 -- -- 69 -- -- -- -- -- -- -- -- -- -- -79 -- -- -78 -- -- 74 -- -- 73 110 -84 100 50 90 650 8 2 -- -- -73 -- -- -71 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 67 -- -- 65 -- -- -- -- -- -- -- -- -- -- -75 -- -- -75 -- -- 72 -- -- 70 110 -84 100 50 90 650 8 2 -- -- -69 -- -- -68 -- -- -- -- -- -- -- -- -- -- -- -- -- -- dB dB dB dB dB dB dB dB dB dB dB dB Vrms dB MHz MHz dB V/s ns ps rms -- -- -0.99 -- -- -- 14 14 0.5 0.5 0.2 0.15 0.1 -- -- -- +1.5 0.4 0.25 0.2 -- -- -- -0.99 -- -- -- 14 14 0.75 0.5 0.3 0.25 0.2 -- -- -- +1.5 0.5 0.5 0.4 -- -- -- -0.99 -- -- -- 14 14 1 0.75 0.3 0.3 0.3 -- -- -- +2.5 0.7 0.7 0.7 -- Bits LSB LSB %FSR %FSR % Bits +2.0 -- -- -- 10 -- -- -- -- 50 -- +0.8 +20 -20 -- +2.0 -- -- -- 10 -- -- -- -- 50 -- +0.8 +20 -20 -- +2.0 -- -- -- 10 -- -- -- -- 50 -- +0.8 +20 -20 -- Volts Volts A A ns MIN. -- 300 -- -- TYP. 1.25 500 10 3 MAX. -- -- 15 -- MIN. -- 300 -- -- 0 to + 0C TYP. 1.25 500 10 3 MAX. -- -- 15 -- MIN. -- 300 -- -- 55 to +125C TYP. 1.25 500 10 3 MAX. -- -- 15 -- UNITS Volts k pF A
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ADS-945
+25C DYNAMIC PERFORMANCE S/H Acquisition Time ( to 0.003%FSR, 2.5V step) Overvoltage Recovery Time A/D Conversion Rate ANALOG OUTPUT Reference Output Reference Temperature Drift Reference Load Current DIGITAL OUTPUTS Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Delay, Rising Edge of Start Convert to Output Data Valid Delay, Edge of ENABLE to Output Data Valid/Invalid Output Coding POWER REQUIREMENTS Power Supply Ranges +15V Supply -15V Supply +5V Supply -5.2V Supply Power Supply Currents +15V Supply -15V Supply +5V Supply -5.2V Supply Power Dissipation Power Supply Rejection +14.25 -14.25 +4.75 -4.95 -- -- -- -- -- -- +15.0 -15.0 +5.0 -5.2 +35 -10 +290 -350 4.0 -- +15.75 -15.75 +5.25 -5.45 +45 -20 +320 -390 4.3 0.04 +14.25 -14.25 +4.75 -4.95 -- -- -- -- -- -- +15.0 -15.0 +5.0 -5.2 +35 -10 +290 -350 4.0 -- +15.75 -15.75 +5.25 -5.45 +45 -20 +320 -390 4.3 0.04 +14.25 -14.25 +4.75 -4.95 -- -- -- -- -- -- +15.0 -15.0 +5.0 -5.2 +35 -10 +290 -350 4.0 -- +15.75 -15.75 +5.25 -5.45 +45 -20 +320 -390 4.3 0.04 Volts Volts Volts Volts mA mA mA mA Watts %FSR/%V +2.7 -- -- -- -- -- -- -- -- -- -- -- -- +0.5 -0.4 -8 35 18 +2.7 -- -- -- -- -- -- -- -- -- -- -- +0.5 -0.4 -8 35 +2.7 -- -- -- -- -- -- -- -- -- -- -- -- +0.5 -0.4 -8 35 18 Volts Volts mA mA ns ns +9.95 -- -- +10 40 -- +10.05 -- 2.0 +9.95 -- -- +10 40 -- +10.05 -- 2.0 +9.95 -- -- +10 40 -- +10.05 -- 2.0 Volts ppm/C mA MIN. -- -- 10 TYP. 40 30 -- MAX. -- 100 -- MIN. -- -- 10 0 to + 0C TYP. 40 30 -- MAX. -- 100 -- MIN. -- -- 10 55 to +125C TYP. 40 30 -- MAX. -- 100 -- UNITS ns ns MHz
-- 18 Complementary Offset Binary
Footnotes:
All power supplies should be on before applying a start convert pulse. All supplies and the clock (start convert pulses) must be present during warmup periods. The device must be continuously converting during this time. The input to the ADS-945 is internally clamped at 2.3V. An 50ns wide start convert pulse is used for all production testing. For applications requiring less than a 10MHz sampling rate, a wider start convert can be used. Effective bits is equal to:
(SNR + Distortion) - 1.76 + 20 log 6.02 Full Scale Amplitude Actual Input Amplitude
This is the time required before the A/D output is valid after the analog input is back within its range. Typical +5V and -5.2V current drain breakdowns are as follows: +5VAnalog = +195mA +5VDigital = + 95mA +5VTotal = +290mA -5.2VAnalog = -170mA -5.2VDigital = -180mA -5.2VTotal = -350mA
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-945 requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are connected to each other internally. For optimal performance, tie all ground pins directly to a large analog ground plane beneath the package. Bypass all power supplies to ground with 10F tantalum capacitors in parallel with 0.1F ceramic capacitors. The bypass capacitors should be located as close to the unit as possible. 2. The ADS-945 achieves its specified accuracies without the need for external calibration. If required, the device's small initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figure 2. The typical adjustment range is 0.2%FSR for this circuitry. When using this circuitry, or any similar offset and gaincalibration hardware, make adjustments following warmup. To avoid interaction, always adjust offset before gain. 3. To enable the three-state outputs, apply a logic "0" (low) to OUTPUT ENABLE (pin 34). To disable, apply a logic "1" (high) to pin 34. 4. A passive bandpass filter (Allen Avionics F4202 Series) is used at the input of the A/D for all production testing. 5. The ADS-945's digital outputs should not be directly connected to a noisy data bus. Drive the bus with 573 or 574 type latches and use "low-noise" logic, such as the 74ALS series.
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CALIBRATION PROCEDURE
(Refer to Figure 2 and Table 1) Note: Connect pin 18 to ANALOG GROUND (pin 19) for operation without zero/offset adjustment. Connect pin 9 to ANALOG GROUND (pin 8) for operation without gain adjustment. Any offset and/or gain calibration procedures should not be implemented until devices are fully warmed up. To avoid interaction, offset must be adjusted before gain. The ranges of adjustment for the circuit in Figure 2 are guaranteed to compensate for the ADS-945's initial accuracy errors and may not be able to compensate for additional system errors. A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This can be accomplished by connecting LED's to the digital outputs and adjusting until certain LED's "flicker" equally between on and off. Other approaches employ digital comparators or microcontrollers to detect when the outputs change from one code to the next. For the ADS-945, offset adjusting is normally accomplished at the point where the MSB is a 1 and all other output bits are 0's and the LSB just changes from a 0 to a 1. This digital output transition ideally occurs when the applied analog input is +1/2 LSB (+76.3V). Gain adjusting is accomplished when all bits are 0's and the LSB just changes from a 0 to a 1. This transition ideally occurs when the analog input is at +full scale minus 1 1/2 LSB's (+1.249771V) . Note: Due to inherent system noise, the averaging of several conversions may be needed to accurately adjust both offset and gain to 1LSB of accuracy. Zero/Offset Adjust Procedure 1. Apply a train of pulses to the START CONVERT input (pin 32) so the converter is continuously converting. 2. Apply +76.3V to the ANALOG INPUT (pin 4). 3. Adjust the offset potentiometer until the output bits are 10 0000 0000 0000 and the LSB flickers between 0 and 1. Gain Adjust Procedure 1. Apply +1.249771V to the ANALOG INPUT (pin 4). 2. Adjust the gain potentiometer until all output bits are 0's and the LSB flickers between 0 and 1. 3. To confirm proper operation of the device, vary the applied input voltage to obtain the output coding listed in Table 1. Note: A single +5V supply can be used for both the +5V ANALOG and the +5V DIGITAL. If separate supplies are used, the difference between the two can not exceed 100mV. This also applies to the -5.2V supply requirements. Datel recommends using ferrite beads to separate the analog and digital supplies (FAIR-RITE # 2643000301.)
Table 1. Output Coding
OUTPUT CODING MSB LSB 00 00 00 01 10 11 11 11 0000 0111 1111 1111 1111 0111 1111 1111 0000 0000 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1110 1111 1111
INPUT RANGE 1.25V +1.249847 +0.937500 +0.625000 0.000000 -0.625000 -0.937500 -1.249847 -1.250000
BIPOLAR SCALE +FS -1 LSB +3/4 FS +1/2FS 0 -1/2FS -3/4FS -FS +1 LSB -FS
COMP. OFF. BINARY
10F +
+
+5V
55 DIGITAL SUPPLY 0.1F 54 DIGITAL 58-60 GROUND 57 DIGITAL SUPPLY 69 ANALOG SUPPLY 0.1F 64-68 ANALOG GROUND
53 BIT 1 (MSB) 52 BIT 2 51 BIT 3 50 BIT 4 49 BIT 5 48 BIT 6 47 BIT 7 46 BIT 8 45 BIT 9 44 BIT 10 43 42 41 40 34 33 30 BIT 11 BIT 12 BIT 13 BIT 14 (LSB)
10F -5.2V
0.1F
10F + 10F -5.2V
+ 0.1F
+5V
ANALOG 63 SUPPLY 12
ADS-945
10F +
+
+15V
0.1F
13 ANALOG 15-17 GROUND 13 START CONVERT 32 +10 REF. OUT 7
OUTPUT ENABLE OVERFLOW T/H STATUS 29 T/H STATUS 4 ANALOG INPUT
10F -15V
+15V 20k 0.1F -15V OFFSET 18 ADJUST GAIN ADJUST 9 0.1F
+15V 20k -15V
Figure 2. ADS-945 Connection Diagram
4
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+5V D
+5VA
+15V
1 2 3 +5VD 4 P3 5 6 +5VA C27 C18 7 VREF +5VA GAIN 67 66 -15V 64 +15V 62 61 60 -5.2VA C20 OFFSET 58 L11 +5VA SG1 C21 +5VD -5.2VD 59 SG3 L10 -5.2VA -5.2VA 63 C19 65 68 C29 + 69 8 9 JPR3 C14 2 1 +15V 13 14 15 16 C16 17 18 19 +15V 2 1 22 23 24 -15V 25 26 27 -15V/80MA 5 +5V D 8 7 6 -V 4 C23 34 14 C26 +15V/50MA 1,7 1 INT -5.2V D C9 10PF (OPT) 8 X1 10MHZ 35 36 37 38 OS3 33 32 O.F. ENABLE CLOCK 3 U4 LT1016 2 30 T/H 31 C3 + 29 T/H +V 1 28 +5VA/350MA R2 20K +5V D C22 +5VD 55 54 OFFSET 3 CW C17 21 20 -5.2VD 57 DNC 56 -15V R5 51.1 1 3 CW R1 20K GAIN -15V C15 -5.2VA 2 +15V 12 11 NC 3 10 70 71 72 L7 IN 73 74 U1 ADS945 75
76
HOLE PATTERN
0.1" GRID
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SG2 AGND
SG4
AGND
-5.2V D
-5.2VA
-15V
DGND
DGND
MSB BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8
D1 C1
P1 POWER SUPPLY CONNECTOR
+
26
25
20 2 1D +5V 19 Q1 3 2D 18 Q2 4 3D 17 Q3 5 4D U6 16 Q4 ALS573 6 15 5D Q5 7 6D 14 Q6 8 7D 13 Q7 9 8D 12 Q8 11 CP 1 GND OC 10
P2 DATA OUTPUT CONNECTOR 34 32 30 28 C28 26 24 22 33 31 29 27 25 23 21
24
23
-5.2VD
L1
22
21
20 C2
19
+5VD
L2
18
17
D2
16
15
-5.2V
L3
+
DATA LATCHES
5
BIT 6 BIT 10 + C4 JPR2 CLOCK 2 3 EXT 1 INT 2 EXT 3 JPR1 OUTPUT ENABLE P4 EXT. CLOCK R3 51.1
(MSB) BIT 1 53 52 BIT 2 BIT 3 51 BIT 4 50 BIT 5 49 48 20 +5V
14
13
12
11
-15V
L4
10
9
8
7
+15V
L5
Q1 Q2 44 4 3D 5 4D 6 5D 7 6D (LSB) BIT 14 40 39 8 7D 9 8D U7 ALS573 Q3 Q4 Q5 Q6
19 18 17 16 15 14 13
20 2 1D 3 2D BIT 9 18 BIT 10 16 BIT 11 14 BIT 12 12 BIT 13 LSB BIT 14 OVERFLOW CLOCK EOC 10 10 8 6 4 2
19 17 15 13 11 9 7 5 3 1 ENABLE Q7 12 Q8 11 CP 1 OC GND BIT 11 43 42 BIT 12 BIT 13 41 BIT 7 47 46 BIT 8 BIT 9 45
6
5
D3
4
3
L6
2
1
+5VA
D4
R12 10K
ADS-945
Figure 3. ADS-945 Evaluation Board Schematic (DATEL Dwg. #A-23442)
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ADS-945
N START CONVERT 50ns typ.
N+1
N+2
10ns typ. T/H 60ns typ. Hold
Acquisition Time 40ns typ.
T/H
Hold
Hold 35ns max. 10ns typ. 90ns typ. DATA N+1 VALID
OUTPUT DATA
DATA N-1 VALID
DATA N VALID
INVALID DATA
Note: Scale is approximately 10ns per division.
Figure 4. ADS-945 Timing Diagram
TIMING NOTES:
1. The ADS-945 is an edge-triggered device requiring no additional external timing signals. The rising edge of the start convert pulse initiates a conversion. 2. A start convert pulse of 50ns is recommended when sampling at 10MHz. 3. The falling edge of the subsequent start convert pulse (N+1) or the rising edge of the N+2 pulse can be used to latch data from conversion N (1 pipeline delay).
0 10 Amplitude Relative to Full Scale (dB) 20 30 40 50 60 70 80 90 100 110 120 130 140 150 0 500 kHz 1 MHz 1.5 MHz 2 MHz 2.5 MHz 3 MHz 3.5 MHz 4 MHz 4.5 MHz 5 MHz
9000 8000 7000 6000 5000 4000 3000 2000 1000 0
Digital Output Code
This histogram represents the typical peak-to-peak noise (including quantization noise) associated with the ADS-945. 16,384 conversions were processed with the input to the ADS-945 tied to analog ground.
Frequency (fs = 10MHz, fin = 4.85MHz, Vin = 0.5dB, 16,384-point FFT)
Figure 5. ADS-945 FFT Analysis
Figure 6. ADS-945 Grounded Input Histogram
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+0.39
DNL (LSB's)
0
Number of Occurences
0.29 0
Digital Output Code
16,384
0
Digital Output Code
16,384
Figure 7. ADS-945 Histogram and Differential Nonlinearity
PH vs. Input Frequency
90 80 70 90 80 70 60
THD vs. Input Frequency
Peak Harmonic (-dB)
60 50 40 30 20 10 0 1 10 100 1000 10000 100000
THD (-dB)
50 40 30 20 10 0 1 10 100 1000 10000 100000
Frequency (kHz)
Frequency (kHz)
SNR vs. Input Frequency
90 80 70 90 80 70
SNR+D vs. Input Frequency
Peak Harmonic (-dB)
SNR+D (dB)
60 50 40 30 20 10 0
60
THD (-dB)
SNR (dB)
50 40 30 20 10 0
1
10
100
1000
10000
100000
1
10
100
1000
10000
100000
Frequency (kHz)
Frequency (kHz)
Figure 8. ADS-945 Dynamic Performance vs. Input Frequency at +25C
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MECHANICAL DIMENSIONS INCHES (mm)
0.29 MAX. (7.37) 0.15 MIN. (3.81) 2.06 MAX. (52.32)
1.80 (45.72) 0.100 (2.54) TYP. 76 1
0.06 (1.52)
3.700 (93.98)
Missing pin 26 is for keying purposes
4.02 (102.11) MAX.
4.06 (103.12) MAX.
0.25 Square (6.35) TYP. 39 38 Insulated surface with internal ground plane Epoxy glass (FR-4) base 2.02 MAX. (51.31)
Metal case
ORDERING INFORMATION
MODEL NUMBER ADS-945 ADS-945EX OPERATING TEMP. RANGE 0 to +70C -55 to +125C ACCESSORIES ADS-945 Evaluation Board (without ADS-945)
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DATEL (UK) LTD. Tadley, England Tel: (01256)-880444 Internet: www.datel-europe.com E-mail: datel.ltd@datel.com DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 01-34-60-01-01 Internet: www.datel-europe.com E-mail: datel.sarl@datel.com
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356 Internet: www.datel.com E-mail: sales@datel.com ISO 9001:2000 REGISTERED
DS-0237F 5/04
DATEL GmbH Munchen, Germany Tel: 89-544334-0 Internet: www.datel-europe.com E-mail: datel.gmbh@datel.com DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-6354-2025 Internet: www.datel-co.jp E-mail: salestko@datel.co.jp, salesosa@datel.co.jp DATEL China Shanghai, China Tel: 011-86-51317131 E-mail: davidx@datel.com
DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.

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